Search result: Catalogue data in Autumn Semester 2017
Computer Science Master  | ||||||
 Focus Courses | ||||||
| Focus Courses in Distributed Systems | ||||||
| Focus Elective Courses Distributed Systems | ||||||
| Number | Title | Type | ECTS | Hours | Lecturers | |
|---|---|---|---|---|---|---|
| 252-0437-00L | Distributed Algorithms | W | 4 credits | 3V | F. Mattern | |
| Abstract | Models of distributed computations, time space diagrams, virtual time, logical clocks and causality, wave algorithms, parallel and distributed graph traversal, consistent snapshots, mutual exclusion, election and symmetry breaking, distributed termination detection, garbage collection in distributed systems, monitoring distributed systems, global predicates. | |||||
| Learning objective | Become acquainted with models and algorithms for distributed systems. | |||||
| Content | Verteilte Algorithmen sind Verfahren, die dadurch charakterisiert sind, dass mehrere autonome Prozesse gleichzeitig Teile eines gemeinsamen Problems in kooperativer Weise bearbeiten und der dabei erforderliche Informationsaustausch ausschliesslich über Nachrichten erfolgt. Derartige Algorithmen kommen im Rahmen verteilter Systeme zum Einsatz, bei denen kein gemeinsamer Speicher existiert und die Übertragungszeit von Nachrichten i.a. nicht vernachlässigt werden kann. Da dabei kein Prozess eine aktuelle konsistente Sicht des globalen Zustands besitzt, führt dies zu interessanten Problemen. Im einzelnen werden u.a. folgende Themen behandelt: Modelle verteilter Berechnungen; Raum-Zeit Diagramme; Virtuelle Zeit; Logische Uhren und Kausalität; Wellenalgorithmen; Verteilte und parallele Graphtraversierung; Berechnung konsistenter Schnappschüsse; Wechselseitiger Ausschluss; Election und Symmetriebrechung; Verteilte Terminierung; Garbage-Collection in verteilten Systemen; Beobachten verteilter Systeme; Berechnung globaler Prädikate. | |||||
| Literature | - F. Mattern: Verteilte Basisalgorithmen, Springer-Verlag - G. Tel: Topics in Distributed Algorithms, Cambridge University Press - G. Tel: Introduction to Distributed Algorithms, Cambridge University Press, 2nd edition - A.D. Kshemkalyani, M. Singhal: Distributed Computing, Cambridge University Press - N. Lynch: Distributed Algorithms, Morgan Kaufmann Publ | |||||
| 252-0817-00L | Distributed Systems Laboratory In the Master Programme max.10 credits can be accounted by Labs on top of the Interfocus Courses. These Labs will only count towards the Master Programme. Additional Labs will be listed on the Addendum. | W | 10 credits | 9P | G. Alonso, T. Hoefler, F. Mattern, T. Roscoe, A. Singla, R. Wattenhofer, C. Zhang | |
| Abstract | This course involves the participation in a substantial development and/or evaluation project involving distributed systems technology. There are projects available in a wide range of areas: from web services to ubiquitous computing including wireless networks, ad-hoc networks, RFID, and distributed applications on smartphones. | |||||
| Learning objective | Gain hands-on-experience with real products and the latest technology in distributed systems. | |||||
| Content | This course involves the participation in a substantial development and/or evaluation project involving distributed systems technology. There are projects available in a wide range of areas: from web services to ubiquitous computing including as well wireless networks, ad-hoc networks, and distributed application on smartphones. The goal of the project is for the students to gain hands-on-experience with real products and the latest technology in distributed systems. There is no lecture associated to the course. For information of the course or projects available, see https://www.dsl.inf.ethz.ch/ or contact Prof. Mattern, Prof. Wattenhofer, Prof. Roscoe or Prof. G. Alonso. | |||||
| 263-2210-00L | Computer Architecture | W | 8 credits | 6G + 1A | O. Mutlu | |
| Abstract | Computer architecture is the science and art of selecting and interconnecting hardware components to create a computer that meets functional, performance and cost goals. This course introduces the basic hardware structure of a modern programmable computer, including the basic laws underlying performance evaluation. | |||||
| Learning objective | We will learn, for example, how to design the control and data path hardware for a MIPS-like processor, how to make machine instructions execute simultaneously through pipelining and simple superscalar execution, and how to design fast memory and storage systems. | |||||
| Content | The principles presented in the lecture are reinforced in the laboratory through the design and simulation of a register transfer (RT) implementation of a MIPS-like pipelined processor in System Verilog. In addition, we will develop a cycle-accurate simulator of this processor in C, and we will use this simulator to explore processor design options. | |||||
| Prerequisites / Notice | Digital technology | |||||
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