227-0147-10L  VLSI 3: Full-Custom Digital Circuit Design

Lehrveranstaltungen

Katalogdaten

Kurzbeschreibung	This third course in our VLSI series is concerned with full-custom digital integrated circuits. The goals include learning the design of digital circuits on the schematic, layout, gate, and register-transfer levels. The use of state-of-the-art CAD software (Cadence Virtuoso) in order to simulate, optimize, and characterize digital circuits is another important topic of this course.
Lernziel	At the end of this course, you will • understand the design of the main building blocks of state-of-the-art digital integrated circuits • be able to design and optimize digital integrated circuits on the schematic, layout, and gate levels • be able to use standard industry software (Cadence Virtuoso) for drawing, simulating, and characterizing digital circuits • understand the performance trade-offs between delay, area, and power consumption
Inhalt	The third VLSI course begins with the basics of metal-oxide-semiconductor (MOS) field-effect transistors (FETs) and moves up the stack towards logic gates and increasingly complex digital circuit structures. The topics of this course include: • Nanometer MOSFETs • Static and dynamic behavior of complementary MOS (CMOS) inverters • CMOS gate design, sizing, and timing • Full-custom standard-cell design • Wire models and parasitics • Latch and flip-flop circuits • Gate-level timing analysis and optimization • Static and dynamic power consumption; low-power techniques • Alternative logic styles (dynamic logic, pass-transistor logic, etc.) • Arithmetic and logic circuits • Fixed-point and floating-point arithmetic • Synchronous and asynchronous design principles • Memory circuits (ROM, SRAM, and DRAM) • In- and near-memory processing architectures • Full-custom accelerator circuits for machine learning The exercises are concerned with schematic entry, layout, and simulation of digital integrated circuits using a disciplined standard-cell-based approach with Cadence Virtuoso.
Literatur	N. H. E. Weste and D. M Harris, CMOS VLSI Design: A Circuits and Systems Perspective (4th Ed.), Addison-Wesley
Voraussetzungen / Besonderes	VLSI 3 can be taken in parallel with “VLSI 1: HDL-based design for FPGAs” and is designed to complement the topics of this course. Basic analog circuit knowledge is required.
Kompetenzen	Fachspezifische Kompetenzen Konzepte und Theorien geprüft Verfahren und Technologien geprüft Methodenspezifische Kompetenzen Analytische Kompetenzen geprüft Problemlösung geprüft

Leistungskontrolle

Information zur Leistungskontrolle (gültig bis die Lerneinheit neu gelesen wird)
Leistungskontrolle als Semesterkurs
ECTS Kreditpunkte	6 KP
Prüfende	C. Studer, O. Castañeda Fernández
Form	Sessionsprüfung
Prüfungssprache	Englisch
Repetition	Die Leistungskontrolle wird nur in der Session nach der Lerneinheit angeboten. Die Repetition ist nur nach erneuter Belegung möglich.
Prüfungsmodus	schriftlich 120 Minuten
Hilfsmittel schriftlich	Student's own hand-written summary: max. 6 one-sided A4 papers. Calculators without communication abilities are allowed; otherwise, no electronic help is permitted. No photocopies or printouts of any form.
Diese Angaben können noch zu Semesterbeginn aktualisiert werden; verbindlich sind die Angaben auf dem Prüfungsplan.

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Elektrotechnik und Informationstechnologie Master	Kernfächer	W
Elektrotechnik und Informationstechnologie Master	Advanced Core Courses	W
Elektrotechnik und Informationstechnologie Master	Empfohlene Fächer	W
Elektrotechnik und Informationstechnologie Master	Vertiefungsfächer	W
Physik Master	Allgemeine Wahlfächer	W
Rechnergestützte Wissenschaften Bachelor	Wahlfächer	W
Rechnergestützte Wissenschaften Master	Wahlfächer	W