263-2210-00L  Computer Architecture

SemesterAutumn Semester 2017
LecturersO. Mutlu
Periodicityyearly recurring course
Language of instructionEnglish



Courses

NumberTitleHoursLecturers
263-2210-00 GComputer Architecture6 hrs
Wed13:15-16:00ML H 44 »
Thu12:15-15:00HG D 16.2 »
25.10.13:15-16:00CAB G 11 »
01.11.13:15-16:00HG D 1.2 »
06.12.13:15-16:00HG D 1.2 »
O. Mutlu
263-2210-00 AComputer Architecture1 hrsO. Mutlu

Catalogue data

AbstractComputer architecture is the science and art of selecting and interconnecting hardware components to create a computer that meets functional, performance and cost goals. This course introduces the basic hardware structure of a modern programmable computer, including the basic laws underlying performance evaluation.
Learning objectiveWe will learn, for example, how to design the control and data path hardware for a MIPS-like processor, how to make machine instructions execute simultaneously through pipelining and simple superscalar execution, and how to design fast memory and storage systems.
ContentThe principles presented in the lecture are reinforced in the laboratory through the design and simulation of a register transfer (RT) implementation of a MIPS-like pipelined processor in System Verilog. In addition, we will develop a cycle-accurate simulator of this processor in C, and we will use this simulator to explore processor design options.
Prerequisites / NoticeDigital technology

Performance assessment

Performance assessment information (valid until the course unit is held again)
Performance assessment as a semester course
ECTS credits8 credits
ExaminersO. Mutlu
Typesession examination
Language of examinationEnglish
RepetitionThe performance assessment is only offered in the session after the course unit. Repetition only possible after re-enrolling.
Mode of examinationwritten 180 minutes
Additional information on mode of examinationone midterm exam of 180 min (25%)
one final exam of 180 min (25%)
semester-long project assignments with final report (35%)
homeworks (15%)
Written aidsNone
This information can be updated until the beginning of the semester; information on the examination timetable is binding.

Learning materials

 
Main linkInformation
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Groups

No information on groups available.

Restrictions

There are no additional restrictions for the registration.

Offered in

ProgrammeSectionType
CAS in Computer ScienceFocus Courses and ElectivesWInformation
Computer Science MasterFocus Elective Courses General StudiesWInformation
Computer Science MasterFocus Elective Courses Distributed SystemsWInformation