Tobias Delbrück: Katalogdaten im Frühjahrssemester 2018

NameHerr Prof. Dr. Tobias Delbrück
Adresse
Institut für Neuroinformatik
ETH Zürich, Y55 G 84
Winterthurerstrasse 190
8057 Zürich
SWITZERLAND
E-Mailtodelbru@ethz.ch
URLhttp://www.ini.uzh.ch/~tobi
DepartementInformationstechnologie und Elektrotechnik
BeziehungTitularprofessor

NummerTitelECTSUmfangDozierende
227-1032-00LNeuromorphic Engineering II Information
Information für UZH Studierende:
Die Lerneinheit kann nur an der ETH belegt werden. Die Belegung des Moduls INI405 ist an der UZH nicht möglich.

Beachten Sie die Einschreibungstermine an der ETH für UZH Studierende: Link
6 KP5GT. Delbrück, G. Indiveri, S.‑C. Liu
KurzbeschreibungThis course teaches the basics of analog chip design and layout with an emphasis on neuromorphic circuits, which are introduced in the fall semester course "Neuromorphic Engineering I".
LernzielDesign of a neuromorphic circuit for implementation with CMOS technology.
InhaltThis course teaches the basics of analog chip design and layout with an emphasis on neuromorphic circuits, which are introduced in the autumn semester course "Neuromorphic Engineering I".

The principles of CMOS processing technology are presented. Using a set of inexpensive software tools for simulation, layout and verification, suitable for neuromorphic circuits, participants learn to simulate circuits on the transistor level and to make their layouts on the mask level. Important issues in the layout of neuromorphic circuits will be explained and illustrated with examples. In the latter part of the semester students simulate and layout a neuromorphic chip. Schematics of basic building blocks will be provided. The layout will then be fabricated and will be tested by students during the following fall semester.
LiteraturS.-C. Liu et al.: Analog VLSI Circuits and Principles; software documentation.
Voraussetzungen / BesonderesPrerequisites: Neuromorphic Engineering I strongly recommended
227-1042-00LElectronics for Physicists II (Digital) Information Belegung eingeschränkt - Details anzeigen
Maximale Teilnehmerzahl: 30
4 KP1V + 3UT. Delbrück
KurzbeschreibungThis course will teach the basics of digital electronics, to give students hands-on experience with using COTS (Commodity Off The Shelf) components to build their own systems. It covers embedded microcontroller programming, logic design on FPGAs, PCB design and assembly.
LernzielThe basic aim is to remove the fear of starting and offer the students a first experience at many levels of design.
InhaltThe course consists of short lectures on theory and exercises using two different hardware platforms - a microcontroller board with Universal Serial Bus (USB) interface, and a Field Programmable Gate Array (FPGA) board. In addition the course includes exercises in printed circuit board (PCB) design and PCB surface mount assembly. Students will complete a project of their own design which they can take with them after the course ends.

Week 1
Lecture:
Introduction and organization
Microcontroller architectures and programming
Architecture (registers and hardware)
Reading a datasheet
Demonstration of programming and using
Exercise:
Install USB board IDE and compiler, compile and run Blink LED program.
Start to design, program, and compile a chaotic attractor to control the PWM output to modulate the LED in an analog, random manner.

Week 2
Lecture:
Data Converters
Analog to Digital (ADC) - flash, single slope, sigma-delta
Digital to Analog (DAC)
Time to Digital
Exercise:
Use the ADC to convert an analog input and display value using LED brightness as output

Week 3
Lecture:
USB interfacing to PC using USB library
Exercise:
Continue ADC project to send values to PC for display

Week 4
Lecture:
PCB design
PCB schematics / gate symbols
PCB footprints
Power supply decoupling / separation
Power planes
PCB design continued
Optocouplers
Power supplies
Decoupling
Components
Exercise:
Start to design daughterboard for AVR32 which adds analog components.
Draw schematic of daughterboard.

Week 5
Lecture:
Binary representations of numbers
Binary arithmetic
2s complement notation for signed binary numbers
Binary addition/subtraction
Parity
Gray codes
Floating point representation
Exercise:
Make footprints / symbols for PCB parts.
Start PCB daughterboard layout.

Week 6
Lecture:
Boolean logic NOT AND OR
Venn diagrams
de Morgan's theorems - exchange AND/OR, complement each term, complement whole
Canonical forms - minterm (sum of products, AND-OR), maxterm (product of sums, OR-AND)
Truth tables
Karnaugh maps and optimization of combinational logic
Exercise:
Finish PCB layout and design check. PCB panel assembled and sent for fabrication.
Parts list ready for order.

Week 7
Lecture:
Sequential logic with state machines
Representation of states and state transitions, state transition actions
Exercise:
Install FPGA tools, synthesize and run example

Week 8
Lecture:
Introduction to using reconfigurable logic (FPGAs, CPLDs, etc)
Introduction to HDLs
Exercise:
Another FPGA example. PCBs back from fabrication.

Week 9
Lecture:
Logic Circuits
Clocks / clock distribution / one shots
Latches / Flip flops- SR, D, level sensitive, edge triggered, master/slave, clocked / un-clocked
Shift registers
Ring oscillator
Counters - ripple, Johnson
Adders
Multipliers
Exercise:
HDL exercise - design a wiggling light bar

Week 10
Lecture:
Logic analog circuits
PLLs/DLLs = Phase locked loops, Delay locked loops
LVDS tranceivers
Level converters, low to high and high to low
Timing diagrams
Exercise:
Soldering PCBs

Week 11
Lecture:
Memory - SRAM, DRAM, embedded
Exercise:
Soldering PCBs, testing PCB projects

Week 12
Testing projects

Week 13
Project demos from students
Voraussetzungen / BesonderesThe course is meant to complement the analog course by teaching how to build systems that convert and process analog information.

Students should have taken Analog Electronics for Physicists or equivalent and should have had some programming experience, preferably with C. Students (or at least each group of 2 / 3 students) need a laptop computer, preferably Windows or Linux. Windows (real or virtual) is required for the FPGA part of the course.