227-0116-00L  VLSI 1: HDL based design for FPGAs

SemesterAutumn Semester 2021
LecturersF. K. Gürkaynak, L. Benini
Periodicityyearly recurring course
Language of instructionEnglish


NumberTitleHoursLecturers
227-0116-00 GVLSI 1: HDL based design for FPGAs5 hrs
Tue08:15-10:00ETF C 1 »
Wed13:15-16:00ETZ D 61.1 »
13:15-16:00ETZ D 61.2 »
13:15-16:00ETZ D 96.1 »
F. K. Gürkaynak, L. Benini