227-0003-00L Digital Circuits

Semester	Autumn Semester 2020
Lecturers	M. Luisier
Periodicity	yearly recurring course
Language of instruction	German

Courses

Number

Title

Hours

Lecturers

227-0003-00 V

Digitaltechnik

«Hybrid»

Vorlesung in Präsenz geplant wie folgt:
16.09. ITET-02,-03,-05,-07,-08,-09;
23.09. ITET-01,-06,-09,-10,-11,-13;
30.09. ITET-04,-05,-06,-07,-08,-10;
07.10. ITET-03,-04,-05,-10,-11,-13;
14.10. ITET-01,-02,-08,-09,-11,-13;
21.10. ITET-02,-03,-04,-05,-06,-07;
28.10. ITET-01,-08,-09,-10,-11,-13;
04.11. ITET-01,-02,-03,-04,-10,-13;
11.11. ITET-02,-04,-05,-06,-07,-11;
18.11. ITET-03,-06,-07,-08,-09,-10;
25.11. ITET-01,-02,-04,-09,-11,-13;
02.12. ITET-03,-04,-05,-06,-08,-13;
09.12. ITET-01,-06,-07,-09,-10,-11;
16.12. ITET-01,-02,-03,-05,-07,-08;

Die Vorlesung kann auch "online" besucht werden.

2 hrs

Wed

10:00-12:00

ON LI NE »

M. Luisier

227-0003-00 U

Digitaltechnik

Groups are selected in myStudies.
Study-Center: Donnerstags 18 - 20 Uhr im ETF E 1

2 hrs

M. Luisier

Catalogue data

Abstract	Digital and analogue signals and their representation. Combinational and sequential circuits and systems, boolean algebra, K-maps. Finite state machines. Memory and computing building blocks in CMOS technology.
Objective	Provide basic knowledge and methods to understand and to design digital circuits and systems.
Content	Digital and analogue signals and their representation. Boolean Algebra, circuit analysis and synthesis, the MOS transistor, CMOS logic, static and dynamic behaviour, tristate logic, Karnough-Maps, hazards, binary nuber systems, coding. Combinational and sequential circuits and systems (boolean algebra, K-maps, etc.). Memory building blocks and memory structures, programmable logic circuits. Finite state machines, architetcure of microprocessors.
Lecture notes	Lecture notes for all lessons, assignments and solutions. https://iis-students.ee.ethz.ch/lectures/digital-circuits/vorlesung/
Literature	Literature will be announced during the lessons. Access to the book «J. Reichardt, "Digitaltechnik: eine Einfuehrung mit VHDL", 4th edition, De Gruyter Studium, 2017.» is provided online by the ETH Library.
Prerequisites / Notice	No special prerequisites.

Performance assessment

Performance assessment information (valid until the course unit is held again)
Performance assessment as a semester course
In examination block for	Bachelor's Degree Programme in Computational Science and Engineering 2016; Version 27.03.2018 (First Year Examination Block 1) Bachelor's Degree Programme in Electrical Engineering and Information Technology 2016; Version 31.10.2017 (First Year Examination Block A) Bachelor's Degree Programme in Electrical Engineering and Information Technology 2017; Version 07.04.2022 (First Year Examination Block A) Bachelor's Programme in Computational Science and Engineering 2012; Version 13.12.2016 (Examination Block) Bachelor's Programme in Electrical Engineering and Information Technology 2012; Version 24.02.2016 (Examination Block)
ECTS credits	4 credits
Examiners	M. Luisier
Type	session examination
Language of examination	German
Repetition	The performance assessment is offered every session. Repetition possible without re-enrolling for the course unit.
Mode of examination	written 120 minutes
Additional information on mode of examination	Die Übungsaufgaben und Zwischentests sind ein wichtiger Bestandteil der Lehrveranstaltung. Die wöchentlichen Übungsserien sowie drei Zwischentests werden als Lernelemente angeboten: wenn Sie mindestens 75% der wöchentlichen Übungsserien bearbeiten und rechtzeitig zur Korrektur einreichen und wenn Sie an zwei Zwischentests teilnehmen und Ihre Lösung abgeben, wird die in der Sessionsprüfung erworbene Note um 0.25 Notenpunkte erhöht.
Written aids	Alle Hilfsmittel, ausser jegliche Rechner und Kommunikationssysteme (Mobiltelephon etc).
If the course unit is part of an examination block, the credits are allocated for the successful completion of the whole block. This information can be updated until the beginning of the semester; information on the examination timetable is binding.

Learning materials


Main link	Manuskript zur Vorlesung
Literature	J. Reichardt, "Digitaltechnik: eine Einfuehrung mit VHDL", 4. Auflage, De Gruyter Studium, 2017
Only public learning materials are listed.